TDK Electronics · TDK Europe

Modular DC-link solution with xEVCap

June 24, 2026

Driving Innovation in Traction Inverters

 Teaser LG

Redesigning a custom DC-link capacitor for EV traction inverters takes six months and requires high-volume commitments. These two issues quite often kill innovation. TDK flips this model with its modular xEVCap approach: off-the-shelf components, online design data, and the flexibility to scale from prototype to production. But does it work in real life? TDK tested the concept with a 150-kW traction inverter demonstrator with major semiconductor partners.

Changes in the requirements for a traction converter during the project may mean that the entire DC link capacitor must be redesigned. New internal layout. New external connections. New qualification testing. And you can't even start until you hit the volume numbers that make custom tooling worthwhile. The development cycle stretches to six months or more, and your project timeline suffers.

System-level parasitics: It's not just addition

In modular capacitors, the total stray inductance (ESL) is not simply the sum of the individual components. The interaction between elements can add – or subtract – from your total system inductance.

TDK simulated a DC-link with five xEVCap units (B25654A8806K001, 80 µF, 850 V) at 2 MHz. If you add up the individual components – 3.1 nH for semiconductor terminals, 3.7 nH for busbar, and 1.1 nH for the parallel capacitors – you get 7.9 nH. But the actual measured system inductance? 8.3 nH. That extra 0.4 nH comes from electromagnetic interactions between components.

 Fig1
Figure 1:

(Left) Simulation of ESR/ESL for a configuration of 4 elements and 6 elements as per [1]. (Right) Double pulse test by STMicroelectronics (DSC Gemini 800 V/300 kW traction inverter). 4x B25654A8137K002 (4x 135 μF/850 V), showing a total stray inductance

The math looks like this: ESLDC-Link = Σ(ESLcomponents) ± Σ(ESLinteractions)

TDK validated this by using STMicroelectronics’ 800 V/300 kW traction inverter. Double pulse testing showed 13 nH total stray inductance, matching our FEM simulations (Figure 1).

There are three ways to reduce system ESL: 

  • Optimize power module connections to cut terminal inductance.
  • Maximize busbar overlap. Add more capacitive elements in parallel.
  • Each additional module reduces total inductance, though with diminishing returns.

ESR isn't constant – and that matters

ESR varies with frequency. Two current waveforms with identical RMS values will produce different losses if their frequency content differs. TDK demonstrated this with the same capacitor and the same RMS current – a pure 10 kHz sine wave, and a realistic automotive switching spectrum. The losses and their distribution across the capacitor were noticeably different (Figure 2).

 Fig2
Figure 2:

Comparison of the power losses in a DC-link capacitor under single frequency 10kHz (left), and under a realistic frequency current spectrum (right)

Five factors drive ESR's frequency dependence: skin effect, inhomogeneous impedance, internal resonances, electromagnetic interactions, and winding geometry. xEVCap addresses the internal capacitor factors. You need to handle the external ones through proper busbar and connection design.

Assembly: Selective wave soldering process for high-reliability joints

Each xEVCap module has eight 1.2 mm diameter copper terminals (four per polarity), tin-plated and designed for laminated busbar or PCB connection.

The soldering process requires careful control of the temperature. If the limits stated in the datasheet are exceeded, the risk of increased ESR due to electrode-film contact degradation or reduced insulation resistance due to dielectric damage increases. For selective wave soldering, pre-heat should be kept below +110 °C, the soldering temperature below +120 °C at the reference measuring points (as indicated in the datasheet), and the soldering time should not exceed 45 seconds. Moreover, a busbar design with soldering islands limits heat flow to the capacitor element while ensuring reliable soldering joints. Thermal cycling and thermal stability tests have shown no weakness in any of the soldering joints, with all producing good results.

Thermal management: Decoupling semiconductors from capacitors

Thermal design for DC-link capacitors revolves around one critical parameter: dielectric hotspot temperature. This determines capacitor lifetime under your mission profile. The challenge is that your capacitors sit right next to the biggest heat source in the system – the power semiconductors.

Terminal temperature: The critical boundary condition

Copper terminals provide a direct, high-conductivity thermal path into the capacitor. TDK ran thermal simulations with 35 W capacitor losses, varying only the semiconductor terminal temperature: +105 °C, +115 °C, and +125 °C. The results were striking – system temperature tracked terminal temperature closely, with the effect concentrated near the semiconductor connections (Figure 3).

 Fig3
Figure 3:

The importance of semiconductor terminal temperature. Thermal simulation with three temperatures at the terminals: +105 °C, +115 °C, and +125 °C. (Cooperation between Infineon Technologies AG and TDK)

The good news: the xEVCap hotspot stayed below the terminal temperatures in all cases, confirmed by subsequent testing.

Active cooling strategy: Location matters

 Fig4
Figure 4:

DC-Link solution with thermopad in selected areas of the busbar to extract heat and decouple semiconductors and xEVCap thermally. (Busbar design by Infineon Technologies AG)

Most automotive DC-link applications need active cooling – the current and frequency demands are too high for passive approaches. Water cooling with closed-loop circuits is standard. But where you place the cooling surface makes a huge difference.

TDK’s approach positions the cooler on the busbar between the semiconductor terminals and capacitors (Figure 4). This serves two purposes:

  • Heat extraction: The cooling surface is optimally located, and copper's high conductivity pulls heat from both busbar and capacitors through their terminals.
  • Thermal decoupling: The cooler physically and thermally separates the capacitors from the semiconductor modules, reducing heat transfer to the dielectric.
 Fig5
Figure 5:

Simulation of a DC-Link solution under two different scenarios: without cooling (left) / with cooling (right). (Red: Losses due to current. Blue: Boundary conditions. Positive: Injection into capacitors. Negative: Extraction) (Cooperation between Infineon and TDK)

Figure 5 shows the dramatic difference. Without cooling, heat accumulates between semiconductors and capacitors, driving up dielectric temperature. With cooling, the semiconductor terminals become the hottest spots, and all heat is extracted through the cooler.

Real-world validation: 150 kW demonstrator testing

TDK built a demonstrator with three xEVCap units (B25654A8806K001, 80 µF/850 V, 56 A (RMS) each) for a nominal 150 kW capacity. The setup includes removable cooling and heating elements to simulate semiconductor losses and test thermal integration under realistic conditions.

Testing ran at 168 A (RMS) at 20 kHz. Nine 175 W cartridge heaters simulated approximately 1500 W of semiconductor losses, positioned to match actual module locations. Additional resistors at the busbar connection reproduced thermal effects from semiconductor terminals. A 3.2 W/(m·K) thermal pad, 1.5 mm thick, ensured good thermal contact with the cooling surface.

TDK tested across a matrix of conditions: water inlet temperature (+50 °C or +60 °C), flow rate (5 L/min or 8 L/min), and busbar-semiconductor connection temperature (+70 °C to +100 °C).

Key results (Figure 6): Without cooling, the busbar temperature hit +55 °C with a maximum capacitor temperature of +62.1 °C. With full cooling and heating (water at +60 °C to +64 °C, heater at +135 °C), the hottest point shifted to the xEVCap terminals at +85.7 °C. The system successfully extracted capacitor heat, with the cooled busbar area running cooler than the capacitor hot spots. This validates the thermal decoupling strategy.

 Fig6
Figure 6:

Temperatures at the different measuring points of the 150-kW converter at a current of 168 A (RMS)

Breaking free from the six-month timeline

The traction inverter industry has historically relied on custom DC-link capacitors – a model that works well for high-volume production but creates significant barriers for development speed and flexibility.

xEVCap applies catalog component philosophy from lower-power electronics to main traction inverters. Multiple ratings, voltages, and configurations are available off-the-shelf. All design information is online. The approach trades some optimization potential for speed, flexibility, and lower entry barriers – eliminating those six-month redesign cycles.

The system-level work described here – validated through FEM simulation, double pulse testing, and thermal demonstrators in collaboration with STMicroelectronics, Infineon Technologies, Rogers Corporation, and Hamamatsu Photonics – shows that modular solutions can meet automotive performance requirements when properly integrated.

For many applications, especially in development, smaller volume production, or where supply chain flexibility matters, the modular approach offers compelling advantages. The key is to have both options available.

Currently, we're working on further miniaturization, integration with EMC filters, and continued optimization of assembly processes, including automated laser soldering. Virtual characterization tools are in development to model the complete system thermal behavior under various power and cooling scenarios.
 

By David Olalla, Tomas Wagner, Fernando Rodriguez, and Alberto Espinar TDK Electronics

References

[1] D. Olalla et al., 'A Modular DC-Link Capacitor Solution for the Main Powertrain Inverter of xEVs,' PCIM 2024

[2] S. Chowdhury, E. Gurpinar, 'Capacitor Technologies: Characterization, Selection, and Packaging,' IEEE Trans. Transportation Electrification, Vol. 8, No. 2, 2022

[3] F. Auñón et al., 'Film Capacitor Standard Series Digitalization: Electromagnetic & Thermal Modeling implementation in CLARA Web Tool,' PCIM 2024

[4] TDK xEVCap datasheet B25654A*001, July 2024

[5] IEC TS 63337 Ed. 1: 'Basic qualification of DC-link film capacitors for automotive use,' February 2024
 



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